(完整版)Hynix海力士FLASH命名规则

Hynix 海力士

H 2 7 X X X X X X X X X - X X

(1) HYNIX

(2) PRODUCT FAMILY

(4) POWER SUPPLY(VCC)

(8) NAND CLASSIFICATION

(7) ORGANIZATION

(14) BAD BLOCK

(11) PACKAGE TYPE

2 : Flash

S: SLC + Single Die + Small Block

A: SLC + Double Die + Small Block

B: SLC + Quadruple Die + Small Block

F: SLC + Single Die + Large Block

G: SLC + Double Die + Large Block

H: SLC + Quadruple Die + Large Block

J: SLC + ODP + Large Block

K: SLC + DSP + Large Block

T: MLC + Single Die + Large Block

U: MLC + Double Die + Large Block

V: MLC + Quadruple Die + Large Block

W: MLC + DSP + Large Block

Y: MLC + ODP + Large Block

C: Included Bad Block

E: 1~5 Bad Block Included

M: All Good Block

I: TSOP1

B: WSOP

S: USOP

P: LSOP1

T: FBGA

V: LGA

S: WLGA

N: VLGA

F: ULGA

X: Wafer

M: PGD1 (chip)

Y: KGD

U: PGD2

W: 1st

C: 2nd

K: 3rd

D: 4th

M

A

B

C

(5), (6) DENSITY

1: 1 nCE & 1 R/nB; Sequential Row Read Enable

2: 1 nCE & 1 R/nB; Sequential Row Read Disable

4: 2 nCE & 2 R/nB; Sequential Row Read Enable

5: 2 nCE & 2 R/nB; Sequential Row Read Disable

D: Dual Interface; Sequential Row Read Disable

F: 4 nCE & 4 R/nB ; Sequential Row Read Disable