专利名称:Phase lock loop circuit发明人:Oga, Toshiyuki申请号:EP97103349.3申请日:19970228公开号:EP0793348A1公开日:19970903
专利附图:
摘要:A phase lock loop circuit includes an oscillator, a digital mixer, a comparator, aloop amplifier, and a low-pass filter. The oscillator has an oscillation frequency controlledby a control voltage. The digital mixer is constituted by a digital element to output adifference frequency signal between an oscillation output from the oscillator and aninput mixing signal. The comparator compares at least the phase of the differencefrequency signal output from the digital mixer with that of a reference frequency signal,and outputs a difference signal. The loop amplifier and the low-pass filter generate thecontrol voltage for the voltage controlled oscillator on the basis of the difference signaloutput from the comparator.
申请人:NEC CORPORATION
地址:7-1, Shiba 5-chome Minato-ku Tokyo JP
国籍:JP
代理机构:VOSSIUS & PARTNER
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