Apparatus, method and system for accelerated graph

专利名称：Apparatus, method and system for

accelerated graphics port bus bridges

发明人：Sompong Paul Olarig,Usha

Rajagopalan,Ronald Timothy Horan

申请号：US10679734申请日：20031006

公开号：US20040068602A1公开日：20040408

专利附图：

摘要：A computer system having at least one central processing unit, system memory,and a core logic capable of accepting an AGP bus is provided with an AGP to AGP bridge

connected to the standard AGP bus. The AGP to AGP bridge can accommodate two ormore AGP-compatible devices that can be accessed through the standard AGP bus via theAGP to AGP bridge. A PCI to memory bridge is also provided within the AGP to AGPbridge so that PCI devices may be connected to the AGP to AGP bridge. The AGP to AGPbridge is fitted with an overall flow control logic that controls the transfer of data to orfrom the various AGP devices and the standard AGP bus that is connected to the corelogic of the computer system. The AGP to AGP Bridge can utilize a standard 32-bit AGPbus as well as (two) dual 32-bit buses to enhance bandwidth. In an alternate embodimentof the invention, the dual 32-bit buses can be combined to form a single -bit bus toincrease the available bandwidth. Alternate embodiments of the AGP to AGP Bridge canaccommodate the single -bit AGP bus for increased performance. Another alternateembodiment can accommodate peer-to-peer transfer of data between AGP busses onthe bridge.

申请人：OLARIG SOMPONG PAUL,RAJAGOPALAN USHA,HORAN RONALD TIMOTHY

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