PRODUCT FEATURES
Datasheet
pin
—hardware configured range 77°C to 112°C in 1°C steps—cannot be disabled or modified by software
Support for 90nm and 65nm CPU diodes
Pin compatible with ADM1032, MAX6649, and LM99Automatically determines external diode type and optimal settings
Resistance Error CorrectionExternal Temperature Monitors
—±1°C Accuracy (60°C < TDIODE < 100°C)—0.125°C Resolution
—Supports up to 2.2nF diode filter capacitor
Internal Temperature Monitor
—±2°C accuracy
3.3V Supply Voltage
Programmable temperature limits for ALERT Small 8-pin MSOP Lead-free RoHS Compliant Package
EMC1422 PIN DESCRIPTION
VDD1DP2DN3SYS_SHDN48765SMCLKSMDATAALERTGNDSMSC EMC1422
DATASHEET
Revision 1.16 (03-15-07)
1°C Temperature Sensor with Hardware Thermal Shutdown
Datasheet
ORDER NUMBER:
EMC1422-1-ACZL-TR FOR 8 PIN, MSOP LEAD-FREE ROHS COMPLIANT PACKAGE
Note:See Table 1.1, \"Part Selection\" for SMBus addressing options.
80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123Copyright © 2007 SMSC or its subsidiaries. All rights reserved.
Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the \"Terms of Sale Agreement\"). The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a registered trademark of Standard Microsystems Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders.
SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Revision 1.16 (03-15-07)
DATASHEET
2SMSC EMC1422
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1°C Temperature Sensor with Hardware Thermal ShutdownDatasheet
Chapter 1Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.1
Part Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Chapter 2Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8Chapter 3Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.13.23.3
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9SMBus Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Chapter 4System Management Bus Interface Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.14.24.34.44.54.64.74.8
System Management Bus Interface Protocol. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Write Byte. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Read Byte. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Send Byte. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Receive Byte. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Alert Response Address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13SMBus Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14SMBus Timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Chapter 5Product Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.15.25.3
5.0.1Conversion Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155.0.2Dynamic Averaging. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15SYS_SHDN Output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16Hardware Thermal Shutdown Limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17ALERT Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175.3.1ALERT Pin Interrupt Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185.3.2ALERT Pin Comparator Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18ALERT and SYS_SHDN Pin Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18Beta Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19Resistance Error Correction (REC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19Diode Faults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19Consecutive Alerts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19Digital Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20Temperature Monitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21Temperature Measurement Results and Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22External Diode Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.45.55.65.75.85.95.105.115.12
Chapter 6Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.16.26.36.46.56.66.76.86.96.106.116.12
Data Read Interlock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26Temperature Data Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26Status Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27Conversion Rate Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28Limit Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29Scratchpad Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29Therm Limit Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30External Diode Fault Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30Software Thermal Shutdown Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30Hardware Thermal Shutdown Limit Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31Channel Mask Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
SMSC EMC1422
DATASHEET
3Revision 1.16 (03-15-07)
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1°C Temperature Sensor with Hardware Thermal Shutdown
Datasheet
Chapter 7Package Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Revision 1.16 (03-15-07)
DATASHEET
4SMSC EMC1422
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1°C Temperature Sensor with Hardware Thermal ShutdownDatasheet
Figure 4.1Figure 5.1Figure 5.2Figure 5.3Figure 5.4Figure 5.5Figure 5.6Figure 5.7Figure 7.1SMBus Timing Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12System Diagram for EMC1422 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Block Diagram of Hardware Thermal Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Isolating ALERT and SYS_SHDN Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18Temperature Filter Step Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20Temperature Filter Impulse Response. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21Block Diagram of Temperature Monitoring Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22Diode Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 238 PIN MSOP / TSSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
SMSC EMC1422
DATASHEET
5Revision 1.16 (03-15-07)
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1°C Temperature Sensor with Hardware Thermal Shutdown
Datasheet
Table 1.1Part Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7Table 2.1 EMC1422 Preliminary Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8Table 3.1Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Table 3.2Electrical Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Table 3.3SMBus Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11Table 4.1Protocol Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Table 4.2Write Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Table 4.3Read Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Table 4.4Send Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Table 4.5Receive Byte Protocol. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Table 4.6Alert Response Address Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Table 5.1Supply Current vs. Conversion Rate for EMC1422. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16Table 5.2SYS_SHDN Threshold Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Table 5.3 EMC1422 Temperature Data Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22Table 6.1Register Set in Hexadecimal Order. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24Table 6.2Temperature Data Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26Table 6.3Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26Table 6.4Configuration Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27Table 6.5Conversion Rate Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28Table 6.6Conversion Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28Table 6.7Temperature Limit Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29Table 6.8Scratchpad Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29Table 6.9Therm Limit Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30Table 6.10External Diode Fault Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30Table 6.11Software Thermal Shutdown Configuration Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30Table 6.12Hardware Thermal Shutdown Limit Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31Table 6.13Channel Mask Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31Table 6.14Consecutive ALERT Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32Table 6.15Consecutive Alert / THERM Settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33Table 6.16High Limit Status Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33Table 6.17Low Limit Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34Table 6.18THERM Limit Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34Table 6.19Filter Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34Table 6.20Filter Settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35Table 6.21Product ID Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35Table 6.22Manufacturer ID Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35Table 6.23Revision Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Revision 1.16 (03-15-07)
DATASHEET
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1°C Temperature Sensor with Hardware Thermal ShutdownDatasheet
VDDSYS_SHDN Limit EMC1422SwitchingCurrentLimit ComparatorConversion Rate RegisterDigital MuxΔΣADCDP1Internal Temperature RegisterHigh Limit RegistersDN1Internal Temp DiodeConfiguration RegisterStatus RegistersInterupt MaskingSMBus InterfaceAnalog MuxExternal Temperature Register(s)Digital MuxLow Limit RegistersSMCLKSMDATAALERTSYS_SHDNGNDThe EMC1422 device configuration is highlighted below.
Table 1.1 Part Selection
FUNCTIONALITY
DIODE 2DEFAULTCONFIGURATION
N/A
PARTNUMBEREMC1422 - 1
SMBUSADDRESS100_1100b
EXTERNALDIODES
1
DIODE 1 DEFAULTCONFIGURATIONDetect Diode w/ REC enabled
OTHERSoftware programmable and maskable High LimitSoftware programmable and maskable SYS_SHDN
LimitHardware set SYS_SHDN Limit on External Diode
1
PRODUCT
ID
22h
SMSC EMC1422
DATASHEET
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1°C Temperature Sensor with Hardware Thermal Shutdown
Datasheet
Table 2.1 EMC1422 Preliminary Pin Description
PIN NUMBER
1234
VDDDPDNSYS_SHDN
NAME
FUNCTION
Power supply
External diode positive (anode) connection
External diode negative (cathode) connection
Active low System Shutdown output signal - requires pull-up resistor which selects the Hardware Thermal Shutdown LimitGround
Active low digital ALERT output signal - requires pull-up resistor,SMBus Data input/outputSMBus Clock input
PowerAIOAIOOD
TYPE
5678
GNDALERTSMDATASMCLK
PowerODDIODDI
The pin types are described below:
Power - these pins are used to supply either VDD or GND to the device.AIO - Analog Input / Output.DI - Digital Input.
OD - Open Drain Digital Output.
DIOD - Digital Input / Open Drain Output.
Revision 1.16 (03-15-07)
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1°C Temperature Sensor with Hardware Thermal ShutdownDatasheet
Table 3.1 Absolute Maximum Ratings
DESCRIPTION
Supply Voltage (VDD)
Voltage on SMDATA and SMCLK pinsVoltage on any other pin to GroundOperating Temperature Range Storage Temperature RangeLead Temperature Range
Package Thermal Characteristics for MSOP-8
Thermal Resistance (θj-a)ESD Rating, All pins HBM
140.82000
°C/WV
RATING-0.3 to 5.0-0.3 to 5.5-0.3 to VDD +0.3-40 to +125-55 to +150
Refer to JEDEC Spec. J-STD-020
UNITVVV°C°C
3.2
Electrical Specifications
Table 3.2 Electrical Specifications
VDD = 3.0V to 3.6V, TA = -40°C to 125°C, all typical values at TA = 27°C unless otherwise noted.
CHARACTERISTICSYMBOLMINTYPMAXUNITSCONDITIONS
DC Power
Supply VoltageSupply Current
VDDIDD
3.0
3.3150750
3.6220
VuAuA
1 conversion / sec, dynamic averaging disabled
> 16 conversions / sec, dynamic averaging enabledSMSC EMC1422
DATASHEET
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1°C Temperature Sensor with Hardware Thermal Shutdown
Datasheet
Table 3.2 Electrical Specifications (continued)
VDD = 3.0V to 3.6V, TA = -40°C to 125°C, all typical values at TA = 27°C unless otherwise noted.CHARACTERISTIC
SYMBOL
MIN
TYP
MAX
UNITS
CONDITIONS
Internal Temperature Monitor
Temperature Accuracy
±0.25
±1±2
Temperature Resolution
0.125
°C°C°C
0°C < TA < 85°C
External Temperature Monitor
Temperature Accuracy
±0.25±0.5
Temperature ResolutionConversion Time all ChannelsCapacitive Filter
tCONVCFILTER
0.1251902.2
2.5±1±2
°C°C°CmsnF
EMC1422, default settingsConnected across external diode+20°C < TDIODE < +100°C 0°C < TA < 85°C-40°C < TDIODE < 127°C
ALERT and SYS_SHDN pins
Output Low VoltagePower up time
VOL
0.4
15
Vms
ISINK = 8mATemp selection readNote 3.1
and ALERT pins must not be pulled low.
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Table 3.3 SMBus Electrical Specifications
VDD = 3.0V to 3.6V, TA = -40°C to 125°C, all typical values are at TA = 27°C unless otherwise noted.CHARACTERISTIC
SYMBOL
MIN
TYP
MAX
UNITS
CONDITIONS
SMBus Interface
Input High VoltageInput Low VoltageInput High/Low CurrentInput High/ Low CurrentHysteresisInput CapacitanceOutput Low Sink Current
CINIOL
8.2
4205
15
SMBus Timing
Clock FrequencySpike SuppressionBus free time Start to Stop
Hold Time: StartSetup Time: StartSetup Time: StopData Hold TimeData Setup TimeClock Low PeriodClock High PeriodClock/Data Fall timeClock/Data Rise timeCapacitive Load
fSMBtSPtBUFtHD:STAtSU:STAtSU:STPtHD:DATtSU:DATtLOWtHIGHtFALLtRISECLOAD
1.30.60.60.60.31001.30.6
300300400
10
40050
kHznsusususususnsususnsnspF
Min = 20+0.1CLOAD nsMin = 20+0.1CLOAD nsper bus line
VIHVILIIH / IIL
2.0-0.3-1
VDD0.81TBD
VVuAuAmVpFmA
SMDATA = 0.4V5V Tolerant5V Tolerant
TA = 27°C, SMDATA / SMCLK = 0V to VDD
SMDATA / SMCLK = 0V to 5.5V
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The EMC1422 communicates with a host controller, such as an SMSC SIO, through the SMBus. The SMBus is a two-wire serial communication protocol between a computer host and its peripheral devices. A detailed timing diagram is shown in Figure 4.1.
.
TLOWTHIGHTHD:STATSU:STOSMCLKTHD:STATRISETFALLTHD:DATTSU:DATTSU:STASMDTATBUFPSS - Start ConditionSP - Stop ConditionPFigure 4.1 SMBus Timing Diagram
The EMC1422 is SMBus 2.0 compatible and support Send Byte, Read Byte, Write Byte, Receive Byte, and the Alert Response Address as valid protocols as shown below.All of the below protocols use the convention in Table 4.1.
Table 4.1 Protocol FormatDATA SENT TO DEVICE# of bits sent
DATA SENT TO THE HOST# of bits sent
Attempting to communicate with the EMC1422 SMBus interface with an invalid slave address or invalid protocol will result in no response from the device and will not affect its register contents. Stretching of the SMCLK signal is supported, provided other devices on the SMBus control the timing.
4.2
Write Byte
The Write Byte is used to write one byte of data to the registers as shown below Table 4.2:
Table 4.2 Write Byte Protocol
SLAVE ADDRESS
7
REGISTER ADDRESS
8
REGISTER DATA
8
START1
WR1
ACK1
ACK1
ACK1
STOP1
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The Read Byte protocol is used to read one byte of data from the registers as shown in Table 4.3.
Table 4.3 Read Byte Protocol
START
SLAVE ADDRESS
WR
ACK
REGISTER ADDRESS
ACK
START
SLAVE ADDRESS
RD
ACK
REGISTER DATA
NACK
STOP
1711811711811
4.4Send Byte
The Send Byte protocol is used to set the internal address register pointer to the correct address location. No data is transferred during the Send Byte protocol as shown in Table 4.4.
Table 4.4 Send Byte Protocol
SLAVE ADDRESS
7
REGISTER ADDRESS
8
START1
WR1
ACK1
ACK1
STOP1
4.5Receive Byte
The Receive Byte protocol is used to read data from a register when the internal register address pointer is known to be at the right location (e.g. set via Send Byte). This is used for consecutive reads of the same register as shown in Table 4.5.
Table 4.5 Receive Byte Protocol
SLAVE ADDRESS
7
START1
RD1
ACK1
REGISTER DATA
8
NACK1
STOP1
4.6Alert Response Address
The ALERT output can be used as a processor interrupt or as an SMBus Alert.
When it detects that the ALERT pin is asserted, the host will send the Alert Response Address (ARA) to the general address of 000_1100b. All devices with active interrupts will respond with their client address as shown in Table 4.6.
Table 4.6 Alert Response Address Protocol
ALERT RESPONSE ADDRESS
7
START1
RD1
ACK1
DEVICE ADDRESS
8
NACK1
STOP1
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1.Send Slave Address and verify that full slave address was sent (i.e. the SMBus communication
from the device was not prematurely stopped due to a bus contention event).2.Set the MASK bit to clear the ALERT pin.
APPLICATION NOTE: The ARA does not clear the Status Register and if the MASK bit is cleared prior to the Status
Register being cleared, the ALERT pin will be reasserted.
4.7SMBus Address
The EMC1422-1 responds to hard-wired SMBus slave address as shown in Table 1.1.Note:Other addresses are available. Contact SMSC for more information.
4.8SMBus Timeout
The EMC1422 supports SMBus Timeout. If the clock line is held low for longer than 30ms, the device will reset its SMBus protocol. This function can be disabled by clearing the TIMEOUT bit in the Consecutive Alert Register (see Section 6.13).
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The EMC1422 is an SMBus temperature sensor with Hardware Thermal Shutdown. The EMC1422monitors one internal diode and one externally connected temperature diode.
Thermal management is performed in cooperation with a host device. This consists of the host reading the temperature data of both the external and internal temperature diodes of the EMC1422 and using that data to control the speed of one or more fans.
The EMC1422 has two levels of monitoring. The first provides a maskable ALERT signal to the host when measured temperatures meet or exceed user programmable limits. This allows the EMC1422 to be used as an independent thermal watchdog to warn the host of temperature hot spots without direct control by the host.
The second level of monitoring asserts the SYS_SHDN pin when the External Diode temperature exceeds a hardware specified threshold temperature. Additionally, the internal diodecan be configured to assert the SYS_SHDN pin when the measured temperature exceeds user programmable limits.Since the EMC1422 automatically corrects for temperature errors due to series resistance in temperature diode lines, there is greater flexibility in where external diodes are positioned and better measurement accuracy than previously available with non-resistance error correcting devices. The automatic beta detection feature means that there is no need to program the device according to which type of diode is present. Therefore, the EMC1422 can power up ready to operate for any system configuration.
Figure 5.1 shows a system level block diagram of the EMC1422.
CPUEMC1422DP1DN1InternalDiodeHostSMCLKSMDATAALERTSYS_SHDNSMBusInterfaceThermal diodePower ControlFigure 5.1 System Diagram for EMC1422
5.0.1Conversion Rates
The EMC1422 may be configured for different conversion rates based on the system requirements. The conversion rate is configured as described in Section 6.5. The default conversion rate is 4 conversions per second. Other available conversion rates are shown in Table 6.6.
5.0.2Dynamic Averaging
Dynamic averaging causes the EMC1422 to measure the external diode channels for an extended time based on the selected conversion rate. This functionality can be disabled for increased power savings at the lower conversion rates (see Section 6.4). When dynamic averaging is enabled, the device will automatically adjust the sampling and measurement time for the external diode channels. This allows
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When enabled, the dynamic averaging will affect the average supply current based on the chosen conversion rate as shown in Table 5.1 for the EMC1422.
Table 5.1 Supply Current vs. Conversion Rate for EMC1422
AVERAGING FACTOR (BASED ON
11-BIT OPERATION)ENABLED (DEFAULT)
16x16x8x4x2x1x0.5x
AVERAGE SUPPLY CURRENTENABLED (DEFAULT)365uA625uA660uA725uA730uA745uA775uA
CONVERSION RATE
1 / sec2 / sec4 / sec (default)
8 / sec16 / sec32 / sec64 / sec
DISABLED130uA165uA225uA350uA485uA745uA775uA
DISABLED
1x1x1x1x1x1x0.5x
5.1SYS_SHDN Output
The SYS_SHDN output is asserted independently of the ALERT output and cannot be masked. If the External Diode temperature exceeds the Hardware Thermal Shutdown Limit for the programmed number of consecutive measurements, then the SYS_SHDN pin is asserted.
The Hardware Thermal Shutdown Limit is defined at power-up via the pull-up resistors on the SYS_SHDN and ALERT pins as shown in Table 5.2. This limit cannot be modified or masked via software.
In addition to External Diode channel triggering the SYS_SHDN pin when the measured temperature exceeds to the Hardware Thermal Shutdown Limit, each of the measurement channels can be configured to assert the SYS_SHDN pin when they exceed the corresponding THERM Limit. When the SYS_SHDN pin is asserted, it will not release until the External Diode temperature drops below the Hardware Thermal Shutdown Limit minus 10°C and all other measured temperatures drop below the THERM Limit minus the THERM Hysteresis value (when linked to SYS_SHDN).
Figure 5.2 shows a block diagram of the interaction between the input channels and the SYS_SHDNpin.
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Hardware Thermal ShutdownInternal DiodeSMBus TrafficTemperature Conversion and THERM Limit CompareH/W Thermal Shutdown SensorTemperature Conversion3.3VSoftware Shutdown Enable3.3VSW_SHDNSYS_SHDNHW_SHDNALERTFunction SelectFigure 5.2 Block Diagram of Hardware Thermal Shutdown
The Hardware Thermal Shutdown Limit temperature is determined by pull-up resistors on the SYS_SHDN and ALERT pins shown in Table 5.2.
Table 5.2 SYS_SHDN Threshold Temperature
SYS_SHDPULL-UP
PULL-UP
ALERT
4.7K OHM ±10%77°C78°C79°C80°C81°C82°C
6.8K OHM ±10%83°C84°C85°C86°C87°C88°C
10K OHM ±10%89°C90°C91°C92°C93°C94°C
15K OHM ±10%95°C96°C97°C98°C99°C100°C
22K OHM ±10%101°C102°C103°C104°C105°C106°C
33K OHM ±10%107°C108°C109°C110°C111°C112°C
4.7K OHM ±10%6.8K OHM ±10%10K OHM ±10%15K OHM ±10%22K OHM ±10%33K OHM ±10%
5.3ALERT Output
The ALERT pin is an open drain output and requires a pull-up resistor to VDD and has two modes of operation: interrupt mode and comparator Mode. The mode of the ALERT output is selected via the ALERT / COMP bit in the Configuration Register (see Section 6.4).
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Pin Interrupt Mode
When configured to operate in interrupt mode, the ALERT pin asserts low when an out of limit measurement (> high limit or < low limit) is detected on any diode or when a diode fault is detected. The ALERT pin will remain asserted as long as an out-of-limit condition remains. Once the out-of-limit condition has been removed, the ALERT pin will remain asserted until the appropriate status bits are cleared.
The ALERT pin can be masked by setting the MASK bit. Once the ALERT pin has been masked, it will be de-asserted and remain de-asserted until the MASK bit is cleared by the user. Any interrupt conditions that occur while the ALERT pin is masked will update the Status Register normally.The ALERT pin is used as an interrupt signal or as an Smbus Alert signal that allows an SMBus slave to communicate an error condition to the master. One or more ALERT outputs can be hard-wired together.
5.3.2ALERT Pin Comparator Mode
When the ALERT pin is configured to operate in comparator mode it will be asserted if if any of the measured temperatures exceeds the respective high limit. The ALERT pin will remain asserted until all temperatures drop below the corresponding high limit minus the THERM Hysteresis value. When the ALERT pin is asserted in comparator mode, the corresponding high limit status bits will be set. Reading these bits will not clear them until the ALERT pin is deasserted. Once the ALERT pin is deasserted, the status bits will be automatically cleared.
The MASK bit will not block the ALERT pin in this mode, however the individual channel masks (see Section 6.12) will prevent the respective channel from asserting the ALERT pin.
5.4ALERT and SYS_SHDN Pin Considerations
Because of the decode method used to determine the Hardware Thermal Shutdown Limit, it is important that the pull-up resistance on both the ALERT and SYS_SHDN pins be within the tolerances shown in Table 5.2. Additionally, the pull-up resistor on the ALERT and SYS_SHDN pins must be connected to the same 3.3V supply that drives the VDD pin.
For 15ms after power up, the ALERT and SYS_SHDN pins must not be pulled low or the Hardware Thermal Shutdown Limit will not be decoded properly. If the system requirements do not permit these conditions, then the ALERT and SYS_SHDN pins must be isolated from their respective busses during this time.
One method of isolating this pin is shown in Figure 5.3.
+3.3V+2.5 - 5VVDD1DP1DN1SYS_SHDN23410987SMCLKSMDATAALERTGND4.7K -33K22KShared Alert/ Figure 5.3 Isolating ALERT and SYS_SHDN PinsRevision 1.16 (03-15-07)
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The EMC1422 is configured to monitor the temperature of basic diodes (e.g. 2N3904), or CPU thermal diodes. It automatically detects the type of external diode (CPU diode or diode connected transistor) and determines the optimal setting to reduce temperature errors introduced by beta variation.
For discrete transistors configured with the collector and base shorted together, the beta is generally sufficiently high such that the percent change in beta variation is very small. For example, a 10% variation in beta for two forced emitter currents with a transistor whose ideal beta is 50 would contribute approximately 0.25°C error at 100°C. However for substrate transistors where the base-emitter junction is used for temperature measurement and the collector is tied to the substrate, the proportional beta variation will cause large error. For example, a 10% variation in beta for two forced emitter currents with a transistor whose ideal beta is 0.5 would contribute approximately 8.25°C error at 100°C.
5.6Resistance Error Correction (REC)
Parasitic resistance in series with the external diodes will limit the accuracy obtainable from temperature measurement devices. The voltage developed across this resistance by the switching diode currents cause the temperature measurement to read higher than the true temperature. Contributors to series resistance are PCB trace resistance, on die (i.e. on the processor) metal resistance, bulk resistance in the base and emitter of the temperature transistor. Typically, the error caused by series resistance is +0.7°C per ohm. The EMC1422 automatically corrects up to 100 ohms of series resistance.
APPLICATION NOTE: When monitoring a substrate transistor or CPU diode and beta compensation is enabled, the
Ideality Factor should not be adjusted. Beta Compensation automatically corrects for most ideality errors.
5.7Diode Faults
The EMC1422 detects an open on the DP and DN pins, and a short across the DP and DN pins. For each temperature measurement made, the device checks for a diode fault on the external diode channel(s). When a diode fault is detected, the ALERT pin asserts (unless masked, see Section 5.8) and the temperature data reads 00h in the MSB and LSB registers (note: the low limit will not be checked). A diode fault is defined as one of the following: an open between DP and DN, a short from Vdd to DP, or a short from Vdd to DN.
If a short occurs across DP and DN or a short occurs from DP to GND, the low limit status bit is set and the ALERT pin asserts (unless masked). This condition is indistinguishable from a temperature measurement of 0.000degC (-64°C in extended range) resulting in temperature data of 00h in the MSB and LSB registers.
If a short from DN to GND occurs (with a diode connected), temperature measurements will continue as normal with no alerts.
5.8Consecutive Alerts
The EMC1422 contains multiple consecutive alert counters. One set of counters applies to the ALERTpin and the second set of counters applies to the SYS_SHDN pin. Each temperature measurement channel has a separate consecutive alert counter for each of the ALERT and SYS_SHDN pins. All counters are user programmable and determine the number of consecutive measurements that a temperature channel(s) must be out-of-limit or reporting a diode fault before the corresponding pin is asserted.
See Section 6.13 for more details on the consecutive alert function.
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To reduce the effect of noise and temperature spikes on the reported temperature, the External Diodechannel uses a programmable digital filter. This filter can be configured as Level 1, Level 2, or Disabled. The typical filter performance is shown in Figure 5.4 and Figure 5.5.
Filter Step Response90Temperature (C)807060504030201000246Samples8101214DisabledLevel1Level2Figure 5.4 Temperature Filter Step Response
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9080Temperature (C)70605040302010002Filter Impulse ResponseDisabledLevel1Level2468101214SamplesFigure 5.5 Temperature Filter Impulse Response
In general, thermal diode temperature measurements are based on the change in forward bias voltage of a diode when operated at two different currents. This ΔVBE is proportional to absolute temperature as shown in the following equation:
where:
ΔVBE=ηkTq⎛IHIGHln⎜⎜I⎝LOW⎞⎟⎟⎠k = Boltzmann’s constant
T = absolute temperature in Kelvinq = electron charge
[1]
η = diode ideality factor
Figure 5.6 shows a block diagram of the temperature measurement circuit. The negative terminal for the remote temperature diode, DN, is internally biased with a forward diode voltage referenced to ground.
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ILOWIHIGHSubstrate PNPDPResistance Error CorrectionDNAnti-Aliasing FilterΔΣ ADCFigure 5.6 Block Diagram of Temperature Monitoring Circuit
The temperature measurement results are stored in the internal and external temperature registers. These are then compared with the values stored in the high and low limit registers. Both external and internal temperature measurements are stored in 11-bit format with the eight (8) most significant bits stored in a high byte register and the three (3) least significant bits stored in the three (3) MSB positions of the low byte register. All other bits of the low byte register are set to zero.
The EMC1422 has two selectable temperature ranges. The default range is from 0°C to +127°C and the temperature is represented as binary number able to report a temperature from 0°C to +127.875°C in 0.125°C steps.
The extended range is an extended temperature range from -64°C to +191°C. The data format is a binary number offset by 64°C. The extended range is used to measure temperature diodes with a large known offset (such as AMD processor diodes) where the diode temperature plus the offset would be equivalent to a temperature higher than +127°C.Table 5.3 shows the default and extended range formats.
Table 5.3 EMC1422 Temperature Data Format
EXTENDED RANGE RANGE -64°C
TO 191°C000 0000 0000000 0000 0000Note 5.2001 1111 1111010 0000 0000010 0000 0001
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DEFAULT RANGE 0°C TO 127°C000 0000 0000000 0000 0000000 0000 0000000 0000 0000Note 5.1000 0000 0001
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Table 5.3 EMC1422 Temperature Data Format (continued)
EXTENDED RANGE RANGE -64°C
TO 191°C010 0000 1000100 0000 0000100 0000 1000101 1111 1000101 1111 1111110 0000 0000111 1111 0000111 1111 1000111 1111 1111Note 5.4
TEMPERATURE (°C)16465127127.875128190191>= 191.875
DEFAULT RANGE 0°C TO 127°C000 0000 1000010 0000 0000010 0000 1000011 1111 1000011 1111 1111011 1111 1111Note 5.3011 1111 1111011 1111 1111011 1111 1111
The EMC1422 is hard-wired to measure a specific kind of thermal diode and none of the measurement options can be changed by software. Figure 5.7 shows the different diode configurations.
to DPto DNto DPto DPto DNLocal GroundTypical remote substrate transistori.e. CPU substrate PNPTypical remote discrete PNP transistori.e. 2N3906Figure 5.7 Diode Configurations
to DNTypical remote discrete NPN transistori.e. 2N3904SMSC EMC1422
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The registers shown in Table 6.1 are accessible through the SMBus. An entry of ‘-’ indicates that the bit is not used and will always read ‘0’.
Table 6.1 Register Set in Hexadecimal Order
REGISTERADDRESS
00h01h02h
DEFAULT VALUE00h
Page 26
00h00h
Page 26
R/WRRR
REGISTER NAMEInternal Diode Data
High ByteExternal Diode Data
High Byte
Status
FUNCTION
Stores the integer data for the
Internal DiodeStores the integer data for the
External Diode Stores the status bits for the Internal Diode and External DiodesControls the general operation of the device (mirrored at address
09h)Controls the conversion rate for updating temperature data (mirrored at address 0Ah)Stores the 8-bit high limit for the Internal Diode (mirrored at address
0Bh)Stores the 8-bit low limit for the Internal Diode (mirrored at address
0Ch)Stores the integer portion of the high limit for the External Diode (mirrored at register 0Dh)Stores the integer portion of the low limit for the External Diode (mirrored at register 0Eh)Controls the general operation of the device (mirrored at address
03h)Controls the conversion rate for updating temperature data (mirrored at address 04h)
PAGE
03hR/WConfiguration00hPage 27
04hR/WConversion Rate
06h(4/sec)55h (85°C)00h(0°C)
Page 28
05hR/W
Internal Diode High
LimitInternal Diode Low
LimitExternal Diode High Limit High ByteExternal Diode Low Limit High Byte
06hR/W
Page 29
55h (85°C)00h(0°C)
07hR/W
08hR/W
09hR/WConfiguration00hPage 27
0AhR/WConversion Rate
06h(4/sec)
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Table 6.1 Register Set in Hexadecimal Order (continued)
REGISTERADDRESS
DEFAULT VALUE
R/WREGISTER NAMEFUNCTIONPAGE
00h
pin
1Eh1Fh20h21h
RR/WR/WR/W
Hardware Thermal Shutdown LimitChannel Mask RegisterInternal Diode THERM LimitTHERM Hysteresis
When read, returns the selected Hardware Thermal Shutdown LimitControls the masking of individual
channelsStores the 8-bit critical temperature
limit for the Internal Diode Stores the 8-bit hysteresis value that applies to all THERM limitsControls the number of out-of-limit conditions that must occur before
an interrupt is assertedStores the fractional data for the
Internal Diode Status bits for the High LimitsStatus bits for the Low LimitsStatus bits for the THERM Limits
25
Page 30
N/A00h55h(85°C)0Ah (10°C) 70h
Page 31Page 31
Page 30
22hR/WConsecutive ALERTInternal Diode Data
Low ByteHigh Limit StatusLow Limit StatusTHERM Limit Status
Page 32
29h35h36h37h
SMSC EMC1422
RR-CR-CR
00h00h00h00h
Page 26Page 33Page 34Page 34
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Table 6.1 Register Set in Hexadecimal Order (continued)
REGISTERADDRESS
40hFDhFEhFFh
DEFAULT VALUE
00hTable 6.215Dh01h
R/WR/WRRR
REGISTER NAMEFilter ControlProduct IDSMSC IDRevision
FUNCTION
Controls the digital filter setting for
the External Diode channelStores a fixed value that identifies
each product
Stores a fixed value that
represents SMSCStores a fixed value that represents the revision number
PAGEPage 34Page 35Page 35Page 35
When any temperature channel high byte register is read, the corresponding low byte is copied into an internal ‘shadow’ register. The user is free to read the low byte at any time and be guaranteed that it will correspond to the previously read high byte. Regardless if the low byte is read or not, reading from the same high byte register again will automatically refresh this stored low byte data.
6.2Temperature Data Registers
Table 6.2 Temperature Data Registers
ADDR00h29h01h10h
R/WRRRR
REGISTERInternal Diode High ByteInternal Diode Low ByteExternal Diode High ByteExternal Diode Low Byte
B71280.51280.5
B6640.25640.25
B5320.125320.125
B416-16-
B38-8-
B24-4-
B12-2-
B01-1-
DEFAULT
00h00h00h00h
As shown in Table 6.2, all temperatures are stored as an 11-bit value with the high byte representing the integer value and the low byte representing the fractional value left justified to occupy the MSBits.
6.3Status Register
Table 6.3 Status Register
ADDR02h
R/WR
REGISTERStatus
B7BUSY
B6-
B5-
B4HIGH
B3LOW
B2FAULT
B1THERM
B0 HWSD
DEFAULT
00h
The Status Register reports general error conditions. To identify specific channels, refer to Section 6.9, Section 6.14, Section 6.15, and Section 6.16. The individual Status Register bits are cleared when the appropriate High Limit, Low Limit, or THERM Limit register has been read or cleared.
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ALERT or THERM pin to be asserted.
Bit 4 - HIGH - This bit is set when any of the temperature channels exceeds its programmed high limit. See the High Limit Status Register for specific channel information (Section 6.14). When set, this bit will assert the ALERT pin.
Bit 3 - LOW - This bit is set when any of the temperature channels drops below its programmed low limit. See the Low Limit Status Register for specific channel information (Section 6.15). When set, this bit will assert the ALERT pin.
Bit 2 - FAULT - This bit is asserted when a diode fault is detected on any of the external diode channels. See the External Diode Fault Register for specific channel information (Section 6.9). When set, this bit will assert the ALERT pin.
Bit 1 - THERM - This bit is set when the any of the temperature channels exceeds its programmed THERM limit. See the THERM Limit Status Register for specific channel information (Section 6.16). Bit 0 - HWSD - This bit is set when the External Diode Temperature exceeds the Hardware Thermal Shutdown Limit set by the pull-up resistors on the ALERT and SYS_SHDN pins. When set, this bit will assert the SYS_SHDN pin.
6.4Configuration Register
Table 6.4 Configuration Register
ADDR03h
R/WREGISTERB7MASK_ALL
B6B5ALERT/ COMP
B4B3B2B1DAVG_DIS
B0DEFAULT
R/W
09h
Configuration- --RANGE- 00hThe Configuration Register controls the basic operation of the device. This register is fully accessible at either address.
Bit 7 - MASK_ALL - Masks the ALERT pin from asserting.
‘0’ (default) - The ALERT pin is not masked. If any of the appropriate status bits are set the ALERT pin will be asserted.
‘1’ - The ALERT pin is masked. It will not be asserted for any interrupt condition unless it is configured as a THERM pin. The Status Registers will be updated normally.
Bit 5 - ALERT/COMP - Controls the operation of the ALERT pin.
‘0’ (default) - The ALERT pin acts as described in Section 5.3.
‘1’ - The ALERT pin acts in comparator mode as described in Section 5.3.2. In this mode the MASK_ALL bit is ignored.
Bit 2 - RANGE - Configures the measurement range and data format of the temperature channels.
‘0’ (default) - The temperature measurement range is 0°C to +127.875°C and the data format is binary.
‘1’ -The temperature measurement range is -64°C to +191.875°C and the data format is offset binary (see Table 5.3).
Bit 1 - DAVG_DIS - Disables the dynamic averaging feature on all temperature channels.
‘0’ (default) - The dynamic averaging feature is enabled. All temperature channels will be converted with an averaging factor that is based on the conversion rate as shown in Table 5.1.
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Table 6.5 Conversion Rate Register
ADDR04h
R/W
0Ah
R/W
REGISTERConversion Rate
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT06h(4/sec)
----CONV[3:0]
The Conversion Rate Register controls how often the temperature measurement channels are updated and compared against the limits. This register is fully accessible at either address.Bits 3-0 - CONV[3:0] - Determines the conversion rate as shown in Table 6.6.
Table 6.6 Conversion Rate
CONV[3:0]
HEX0h1h2h3h4h5h6h7h8h9hAhBh - Fh
300000000111
200001111000
All others
100110011001
001010101010
CONVERSIONS / SECOND
1 1 1 11 24 (default)
81632 64 1
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Table 6.7 Temperature Limit Registers
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
05h0Bh06h0Ch07h0Dh
R/W
Internal Diode High LimitInternal Diode Low LimitExternal Diode High Limit High ByteExternal Diode High Limit Low ByteExternal Diode Low Limit High ByteExternal Diode Low Limit Low Byte
1286432168421
55h(85°C)00h(0°C)
R/W1286432168421
R/W1286432168421
55h(85°C)
13hR/W0.50.250.125-----00h
08h0Eh
R/W
1286432168421
00h(0°C)
14hR/W0.50.250.125-----00h
The device contains both high and low limits for all temperature channels. If the measured temperature exceeds the high limit, then the corresponding status bit is set and the ALERT pin is asserted. Likewise, if the measured temperature is less than or equal to the low limit, the corresponding status bit is set and the ALERT pin is asserted.
The data format for the limits must match the selected data format for the temperature so that if the extended temperature range is used, the limits must be programmed in the extended data format.The limit registers with multiple addresses are fully accessible at either address.
6.7Scratchpad Registers
Table 6.8 Scratchpad Register
ADDR11h12h
R/WR/WR/W
REGISTERScratchpadScratchpad
B777
B666
B555
B444
B333
B222
B111
B000
DEFAULT00h00h
The Scratchpad Registers are Read Write registers that are used for place holders to be software compatible with legacy programs. Reading from the registers will return what is written to them.
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Table 6.9 Therm Limit Registers
ADDR.19h
R/WR/W
REGISTERExternal Diode THERM
LimitInternal Diode THERM LimitTHERM Hysteresis
B7128
B664
B532
B416
B38
B24
B12
B01
DEFAULT55h(85°C)55h(85°C)0Ah(10°C)
20h21h
R/WR/W
128128
6464
3232
1616
88
44
22
11
Table 6.10 External Diode Fault Register
ADDR.
R/W
REGISTERExternal Diode Fault
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
1BhR-C----
--
FLT-00h
The External Diode Fault Register indicates which of the external diodes caused the FAULT bit in the Status Register to be set. This register is cleared when it is read.
Bit 1 - FLT - This bit is set if the External Diode channel reported a diode fault.
6.10Software Thermal Shutdown Configuration Register
Table 6.11 Software Thermal Shutdown Configuration Register
ADDR.R/WREGISTERSoftware Thermal Shutdown Configuration
B7B6B5B4B3B2B1B0DEFAULT
1DhR/W----
--
EXTSYSINTSYS00h
The Software Thermal Shutdown Configuration Register controls whether any of the software channels will assert the SYS_SHDN pin. If a channel is enabled, the temperature is compared against the corresponding THERM Limit. If the measured temperature exceeds the THERM Limit, then the SYS_SHDN pin is asserted. This functionality is in addition to the Hardware Shutdown circuitry.Bit 1 - EXTSYS - configures the External Diode channel to assert the SYS_SHDN pin based on the THERM Limit.
‘0’ (default) - the External Diode channel is not linked to the SYS_SHDN pin. If the temperature exceeds the THERM Limit, the ETHERM status bit is set but the SYS_SHDN pin is not asserted.‘1’ - the External Diode channel is linked to the SYS_SHDN pin. If the temperature exceeds the THERM Limit, the ETHERM status bit is set and the SYS_SHDN pin is asserted. It will remain asserted until the temperature drops below the THERM Limit minus the THERM Hysteresis.
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SYS_SHDN pin based on it’s
respective THERM Limit.
‘0’ (default) - the Internal Diode channel is not linked to the SYS_SHDN pin. If the temperature exceeds it’s THERM Limit, the ITHERM status bit is set but the SYS_SHDN pin is not asserted.‘1’ - the Internal Diode channel is linked to the SYS_SHDN pin. If the temperature exceeds it’s THERM Limit, the ITHERM status bit is set and the SYS_SHDN pin is asserted. It will remain asserted until the temperature drops below it’s THERM Limit minus the THERM Hysteresis.
6.11
Hardware Thermal Shutdown Limit Register
Table 6.12 Hardware Thermal Shutdown Limit Register
ADDR.1Eh
R/WR
REGISTERHardware Thermal Shutdown Limit
B7128
B664
B532
B416
B38
B24
B12
B01
DEFAULT
N/A
This read only register returns the Hardware Thermal Shutdown Limit selected by the value of the pull-up resistors on the ALERT and SYS_SHDN pins. The data represents the hardware set temperature in °C using the active temperature setting set by the RANGE bit in the Configuration Register. See Table 5.3 for the data format.
When the External Diode Temperature exceeds this limit, the SYS_SHDN pin is asserted and will remain asserted until the External Diode Temperature drops below this limit minus 10°C.
6.12
Channel Mask Register
Table 6.13 Channel Mask Register
ADDR.R/WREGISTERChannel Mask
B7B6B5B4B3B2B1E MASK
B0INT MASK
DEFAULT
1FhR/W----
- -
00h
The Channel Mask Register controls individual channel masking. When a channel is masked, the ALERT pin will not be asserted when the masked channel reads a diode fault or out of limit error. The channel mask does not mask the SYS_SHDN pin.
Bit 1 - EMASK - Masks the ALERT pin from asserting when the External Diode channel is out of limit or reports a diode fault.
‘0’ (default) - The External Diode channel will cause the ALERT pin to be asserted if it is out of limit or reports a diode fault.
‘1’ - The External Diode channel will not cause the ALERT pin to be asserted if it is out of limit or reports a diode fault.
Bit 0 - INTMASK - Masks the ALERT pin from asserting when the Internal Diode temperature is out of limit.
‘0’ (default) - The Internal Diode channel will cause the ALERT pin to be asserted if it is out of limit.‘1’ - The Internal Diode channel will not cause the ALERT pin to be asserted if it is out of limit.SMSC EMC1422
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Table 6.14 Consecutive ALERT Register
ADDR.22h
R/WR/W
REGISTERConsecutive ALERT
B7TIME OUT
B6
B5CTHRM[2:0]
B4
B3
B2CALRT[2:0]
B1
B0-DEFAULT
70h
The Consecutive ALERT Register determines how many times an out-of-limit error or diode fault must be detected in consecutive measurements before the ALERT or SYS_SHDN pin is asserted. Additionally, the Consecutive ALERT Register controls the SMBus Timeout functionality.
An out-of-limit condition (i.e. HIGH, LOW, or FAULT) occurring on the same temperature channel in consecutive measurements will increment the consecutive alert counter. The counters will also be reset if no out-of-limit condition or diode fault condition occurs in a consecutive reading.
When the ALERT pin is configured as an interrupt, when the consecutive alert counter reaches its programmed value, the following will occur: the STATUS bit(s) for that channel and the last error condition(s) (i.e. EHIGH) will be set to ‘1’, the ALERT pin will be asserted, the consecutive alert counter will be cleared, and measurements will continue.
When the ALERT pin is configured as a comparator, the consecutive alert counter will ignore diode fault and low limit errors and only increment if the measured temperature exceeds the High Limit. Additionally, once the consecutive alert counter reaches the programmed limit, the ALERT pin will be asserted, but the counter will not be reset. It will remain set until the temperature drops below the High Limit minus the THERM Hysteresis value.
For example, if the CALRT[2:0] bits are set for 4 consecutive alerts, the high limits are set at 70°C, and none of the channels are masked, then the ALERT pin will be asserted after the following four measurements:
1.Internal Diode reads 71°C and the external diode reads 69°C. Consecutive alert counter for INT is
incremented to 1.2.Both the Internal Diode and the External Diode read 71°C. Consecutive alert counter for INT is
incremented to 2and for EXT is set to 1.3.The External Diode reads 71°C and the Internal Diode reads 69°C. Consecutive alert counter for
INT is cleared and EXT is incremented to 2.4.The Internal Diode reads 71°C and the external diode reads 71°C. Consecutive alert counter for
INT is set to 1 and EXT is incremented to 3. 5.The Internal Diode reads 71°C and the external diode reads 71°C. Consecutive alert counter for
INT is incremented to 2 and EXT is incremented to 4. The appropriate status bits are set for EXTand the ALERT pin is asserted. EXT counter is reset to 0 and all other counters hold the last value until the next temperature measurement.Bit 7 - TIMEOUT - Determines whether the SMBus Timeout function is enabled.
‘0’ (default) - The SMBus Timeout feature is disabled. The SMCLK line can be held low indefinitely without the device resetting its SMBus protocol.
‘1’ - The SMBus Timeout feature is enabled. If the SMCLK line is held low for more than 30ms, then the device will reset the SMBus protocol.
Bits 6-4 CTHRM[2:0] - Determines the number of consecutive measurements that must exceed the corresponding THERM Limit and Hardware Thermal Shutdown Limit before the SYS_SHDN pin is asserted. All temperature channels use this value to set the respective counters. The consecutive THERM counter is incremented whenever any of the measurements exceed the corresponding THERM Limit or if the External Diode measurement exceeds the Hardware Thermal Shutdown Limit.
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SYS_SHDN pin,
then the SYS_SHDN pin will be asserted low.
Once the SYS_SHDN pin is asserted, the consecutive THERM counter will not reset until the corresponding temperature drops below the appropriate limit minus the corresponding hysteresis. The bits are decoded as shown in Table 6.15. The default setting is 4 consecutive out of limit conversions.
Bits 3-1 - CALRT[2:0] - Determine the number of consecutive measurements that must have an out of limit condition or diode fault before the ALERT pin is asserted. All temperature channels use this value to set the respective counters. The bits are decoded as shown in Table 6.15. The default setting is 1 consecutive out of limit conversion.
Table 6.15 Consecutive Alert / THERM Settings
NUMBER OF CONSECUTIVE OUT OF LIMIT
MEASUREMENTS
1
(default for CALRT[2:0])
23
4
(default for CTHRM[2:0])
20001
10011
00111
6.14
High Limit Status Register
Table 6.16 High Limit Status Register
ADDR.35h
R/WR-C
REGISTERHigh Limit Status
B7-
B6-
B5-
B4-
B3B2B1EHIGH
B0IHIGH
DEFAULT
00h
--
The High Limit Status Register contains the status bits that are set when a temperature channel high limit is exceeded. If any of these bits are set, then the HIGH status bit in the Status Register is set. Reading from the High Limit Status Register will clear all bits if. Reading from the register will also clear the HIGH status bit in the Status Register.
The ALERT pin will be set if the programmed number of consecutive alert counts have been met and any of these status bits are set.
The status bits will remain set until read unless the ALERT pin is configured as a comparator output (see Section 5.3.2).
Bit 1 - EHIGH - This bit is set when the External Diode channel exceeds its programmed high limit. Bit 0 - IHIGH - This bit is set when the Internal Diode channel exceeds its programmed high limit.
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Table 6.17 Low Limit Status Register
ADDR.36h
R/WR-C
REGISTERLow Limit Status
B7-B6-B5-B4-B3
B2
B1ELOW
B0ILOW
DEFAULT
00h
--
The Low Limit Status Register contains the status bits that are set when a temperature channel drops below the low limit. If any of these bits are set, then the LOW status bit in the Status Register is set. Reading from the Low Limit Status Register will clear all bits. Reading from the register will also clear the LOW status bit in the Status Register.
The ALERT pin will be set if the programmed number of consecutive alert counts have been met and any of these status bits are set.
The status bits will remain set until read unless the ALERT pin is configured as a comparator output (see Section 5.3.2).
Bit 1 - ELOW - This bit is set when the External Diode channel drops below its programmed low limit. Bit 0 - ILOW - This bit is set when the Internal Diode channel drops below its programmed low limit.
6.16
THERM Limit Status Register
Table 6.18 THERM Limit Status Register
ADDR.37h
R/WR-C
REGISTERTHERM Limit Status
B7-
B6-
B5-
B4-
B3-
B2B1E THERM
B0ITHERM
DEFAULT
00h
-
The THERM Limit Status Register contains the status bits that are set when a temperature channel THERM Limit is exceeded. If any of these bits are set, then the THERM status bit in the Status Register is set. Reading from the THERM Limit Status Register will not clear the status bits. Once the temperature drops below the THERM Limit minus the THERM Hysteresis, the corresponding status bits will be automatically cleared. The THERM bit in the Status Register will be cleared when all individual channel THERM bits are cleared.
Bit 1 - ETHERM - This bit is set when the External Diode channel exceeds it’s programmed THERM limit.
Bit 0- ITHERM - This bit is set when the Internal Diode channel exceeds it’s programmed THERM limit.
6.17Filter Control Register
Table 6.19 Filter Configuration Register
ADDR.40h
R/WR/W
REGISTERFilter Control
B7-
B6-
B5-
B4-
B3-
B2-
B1B0DEFAULT
00h
FILTER[1:0]
The Filter Configuration Register controls the digital filter on the External Diode channel.
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Table 6.20. See Figure 5.4and Figure 5.5 for examples on the
filter behavior.
Table 6.20 Filter Settings
FILTER[1:0]
10011
00101
AVERAGING
Disabled (default) Level 1Level1Level2
6.18
Product ID Register
Table 6.21 Product ID Register
ADDRFDh
R/WR
REGISTERProduct ID
B70
B60
B51
B40
B30
B20
B11
B00
DEFAULT22h
EMC1422
The Product ID Register holds a unique value that identifies the device.
6.19SMSC ID Register (FEh)
Table 6.22 Manufacturer ID Register
ADDR.FEh
R/WR
REGISTERSMSCID
B70
B61
B50
B41
B31
B21
B10
B01
DEFAULT5Dh
The Manufacturer ID register contains an 8 bit word that identifies the SMSC as the manufacturer of the EMC1422.
6.20Revision Register (FFh)
Table 6.23 Revision Register
ADDR.FFh
R/WR
REGISTERRevision
B70
B60
B50
B40
B30
B20
B10
B01
DEFAULT01h
The Revision register contains an 8 bit word that identifies the die revision.
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DATASHEET
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