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Voltage doubler circuit

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专利名称:Voltage doubler circuit发明人:Edward A. Popka申请号:US05/535244申请日:19741223公开号:US03962591A公开日:19760608

摘要:A voltage doubler circuit is disclosed which uses only resistive, capacitive andsemiconductive components. The circuit, which is extremely rugged and reliable and isideally suited for miniaturization, includes a pair of transistors for controlling thecharging of two capacitors. A third transistor is provided for discharging the twocapacitors onto a voltage doubling capacitor.

申请人:THE UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OFTHE ARMY

代理人:Nathan Edelberg,Robert P. Gibson,Saul Elbaum

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